Preview

Journal of the Russian Universities. Radioelectronics

Advanced search

Selecting a Programming Scheme for Memristor Elements

https://doi.org/10.32603/1993-8985-2022-25-6-61-69

Abstract

Introduction. An array of memristive elements can be used in prospective neural computing systems as a programmable resistance (analog multiplication factor) when performing operations of analog vector multiplication, discrete in time. To form the required resistance, the memristor should be subjected to a programming procedure. This article discusses conventional programming schemes and proposes a new versatile programming scheme for memristor elements.

Aim. To identify or develop an optimal programming scheme for memristors by analyzing the advantages and disadvantages of existing methods.

Materials and methods. The programming procedure can be carried out using either SET or RESET, depending on a different direction of movement according to the volt-ampere characteristic of the memory and its transfer to a particular state. The programming process is controlled in the LTspice circuit modeling program.

Results. Typical programming schemes of memristors were analyzed; advantages and disadvantages of existing methods were revealed. A new versatile circuit based on a variable resistor was proposed. The circuit was simulated both under a fixed resistance of the variable resistor and when varying the memristor resistance values within their permissible range.

Conclusion. In comparison with the RESET mode, the SET programming mode provides for a greater linearity of variations in the memristor resistance. The use of a circuit based on a variable resistor and a bipolar voltage source allows programming of any type and eliminates the need for recommutation of the memristor. The simulation results confirm the feasibility of the proposed method. The proposed circuit can be complemented not only with a comparator, but also with an ADC. This will provide the possibility of selecting various means for measuring the memristor resistance both during programming and for the purpose of monitoring the memristor resistance at the end of the procedure.

About the Authors

E. A. Bukvarev
Nizhny Novgorod State Technical University named after R. E. Alekseev
Russian Federation

Evgenii A. Bukvarev, senior lecturer of the department of informational radio systems

24, Minin St., Nizhny Novgorod 603950



K. S. Fomina
Nizhny Novgorod State Technical University named after R. E. Alekseev
Russian Federation

Ksenia S. Fomina, Engineer, Postgraduate and Assistant of the Department of Informational Radio Systems

24, Minin St., Nizhny Novgorod 603950



S. A. Shchanikov
Murom Institute (branch) of Vladimir State University
Russian Federation

Sergei A. Shchanikov, Cand. Sci. (Eng.) (2013), Associate Professor (2018), leading researcher of the laboratory of designing artificial intelligence systems

23, Orlovskaya St., Murom 602264



References

1. Sharma G., Bhargava L. CMOS-Memristor Inverter Circuit Design and Analysis Using Cadence Virtuoso // Intern. Conf. on Recent Advances and Innovations in Engineering. Jaipur, India, 23–25 Dec. 2016. IEEE, 2016. P. 1–5. doi: 10.1109/ICRAIE.2016.7939571

2. Dao N. C., Koch D. Memristor-based Reconfigurable Circuits: Challenges in Implementation // Intern. Conf. on Electronics, Information and Communication. Barcelona, Spain, 19–22 Jan. 2020. IEEE, 2020. P. 1–6. doi: 10.1109/ICEIC49074.2020.9051174

3. Fully hardware-implemented memristor convolutional neural network / P. Yao, H. Wu, B. Gao, J. Tang, Q. Zhang, W. Zhang, J. J. Yang, H. Qian // Nature. 2020. Vol. 577. P. 641–646. doi: 10.1038/s41586-020-1942-4

4. Neuro-inspired computing chips / W. Zhang, B. Gao, J. Tang, P. Yao, S. Yu, M.-F. Chang, H.-J. Yoo, H. Qian, H. Wu // Nature Electronics. 2020. Vol. 3. P. 371–382. doi: 10.1038/s41928-020-0435-7

5. Zidan M. A., Strachan J. P., Lu W. D. The future of electronics based on memristive systems // Nature Electronics. 2018. Vol. 1. P. 22–29. doi: 10.1038/s41928-017-0006-8

6. Neurohybrid Memristive CMOS-Integrated Systems for Biosensors and Neuroprosthetics / A. Mikhaylov, A. Pimashkin, Y. Pigareva, S. Gerasimova, E. Gryaznov, S. Shchanikov, A. Zuev, M. Talanov, I. Lavrov, V. Demin, V. Erokhin, S. Lobov, I. Mukhina, V. Kazantsev, H. Wu, B. Spagnolo // Frontiers in Neuroscience. 2020. Vol. 14. P. 1–14. doi: 10.3389/fnins.2020.00358

7. In-memory vector-matrix multiplication in monolithic complementary metal–oxide–semiconductor–memristor integrated circuits: design choices, challenges, and perspectives / A. Amirsoleimani, F. Alibart, V. Yon, J. Xu, M. R. Pazhouhandeh, S. Ecoffey, Y. Beilliard, R. Genov, D. Drouin // Advanced Intelligent Systems. 2020. Vol. 2, № 11. P. 2000115. doi: 10.1002/aisy.202000115

8. Yttria-stabilized zirconia cross-point memristive devices for neuromorphic applications / A. V. Emelyanov, K. E. Nikiruy, V. A. Demin, V. V. Rylkov, A. I. Belov, D. S. Korolev, E. G. Gryaznov, D. A. Pavlov, O. N. Gorshkov, A. N. Mikhaylov, P. Dimitrakis // Microelectronic Engineering. 2019. Vol. 215. P. 110988. doi: 10.1016/j.mee.2019.110988

9. Design and Hardware Implementation of Memristor-Based Multilayer Perceptron Network for a Bidirectional Adaptive Neural Interface / S. Shchanikov, A. Zuev, I. Bordanov, D. Nikishov, S. Danilin, A. Belov, D. Korolev, Y. Pigareva, A. Pimashkin, A. Mikhaylov, V. Kazantsev // 3d Intern. Conf. Neurotechnologies and Neurointerfaces. Kaliningrad, Russia, 13–15 Sept. 2021. IEEE, 2021. P. 100– 103. doi: 10.1109/CNN53494.2021.9580437

10. Write and Read Circuit for Memristor Analog Resistance Switching Constantine / S. M. A. Mokhtar, W. F. H. Abdullah, K. A. Kadiran, R. Rifin, M. Omar // IEEE 8th Control and System Graduate Research Colloquium. Shah Alam, Malaysia, 4–5 Aug. 2017. IEEE, 2017. P. 13–16. doi: 10.1109/ICSGRC.2017.8070559

11. Olumodeji O. A., Gottardi M. A pulse-based memristor programming circuit // IEEE Intern. Symp. on Circuits and Systems. Baltimore, Maryland, USA, 28–31 May 2017. IEEE, 2017. P. 1–4. doi: 10.1109/ISCAS.2017.8050793

12. Lee T.-W., Nickel J. H. Memristor Resistance Modulation for Analog Applications // IEEE Electron Device Letters. 2012. Vol. 33, № 10. P. 1456–1458. doi: 10.1109/LED.2012.2207429

13. An Efficient Programming Framework for Memristor-based Neuromorphic Computing Grace / L. Zhang, B. Li, X. Huang, C. Shen, S. Zhang, F. Burcea, H. Graeb, T.-Y. Ho, H. Li, U. Schlichtmann // Design, Automation & Test in Europe Conference & Exhibition. Grenoble, France, 1–5 Feb. 2021. IEEE, 2021. P. 1068– 1073. doi: 10.23919/DATE51398.2021.9474084

14. Reliability of analog resistive switching memory for neuromorphic computing / M. Zhao, B. Gao, J. Tang, H. Qian, H. Wu // Applied Physics Reviews. 2020. Vol. 7, № 1. P. 011301. doi: 10.1063/1.5124915

15. Gomez J., Vourkas I., Abusleme A. Exploring Memristor Multi-Level Tuning Dependencies on the Applied Pulse Properties via a Low Cost Instrumentation Setup // IEEE Access. 2019. Vol. 7. P. 59413–59421. doi: 10.1109/ACCESS.2019.2915100


Review

For citations:


Bukvarev E.A., Fomina K.S., Shchanikov S.A. Selecting a Programming Scheme for Memristor Elements. Journal of the Russian Universities. Radioelectronics. 2022;25(6):61-69. (In Russ.) https://doi.org/10.32603/1993-8985-2022-25-6-61-69

Views: 458


Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.


ISSN 1993-8985 (Print)
ISSN 2658-4794 (Online)