Optimization and Fabrication of Heterojunction Silicon Solar Cells Using an Experimental-Industrial Facility AK-1000 Inline

Introduction. Heterojunction silicon solar cells represent one of the most promising directions for the development of solar photovoltaics. This is due to both their high power conversion efficiency and reasonable likelihood for further growth in performance, as well as good commercial potential of this technology, which relies on a transition from conventional diffusion-based processes to thin film deposition. Aim. The paper describes results of optimization and fabrication of heterojunction silicon solar cells using the AK-1000 inline tool, adapted for processing of 6-inch wafers. Materials and methods. In the manufacturing of solar cells, crystalline silicon wafers were subjected to wet chemical processes, and then electron, hole, and intrinsic types of conductivity of the layers based on amorphous silicon were deposited by plasma-chemical deposition. Precipitation of oxide transparent conductive layers was carried out by magnetron sputtering. To optimize the processes of obtaining solar cells, measurements of the reflection coefficient, of lifetime of minority carriers, and of current – voltage characteristics were used. Results. As a result of the work, heterojunction solar cells were obtained in a laboratory in Kazakhstan with an efficiency of 20% without using of traditional diffusion processes for solar cells manufacturing. Conclusions. The output parameters associated with light conversion efficiency demonstrate the possibility of further optimization of the parameters affecting the performance of heterojunction solar cells.


Introduction.
Being the second most abundant chemical element in the earth crust, superseded by only oxygen, silicon is poised to dominate the field of large-scale terrestrial photovoltaics through years to come [1,2]. Among the silicon-based photovoltaic devices, the highest power conversion efficiency is currently demonstrated by heterostructured solar cells employing a semiconductor junction between crystalline and amorphous silicon. The technology of formation of such a heterojunction relies on plasma chemical vapor deposition of thin films of hydrogenated silicon (a-Si:H) onto a monocrystalline silicon wafer (c-Si). This combination enables to obtain solar cells with record power conversion efficiencies exceeding 26 % [3][4][5]. One of the confirmations of the high promise of this technology is its successful commercialization in the Commonwealth of the Independent States (CIS) [6,7]. Further expansion of this technology is linked to demonstration of the industrial capability of the heterojunction silicon cell technology and its expansion to various parts of the world.
A monocrystalline silicon wafer is the main component for photovoltaic devices. Upon formation of the semiconductor junction, high-quality passivation of the wafer surface is required to reduce surface recombination of the charge carriers. The surface lifetime τ s of minority carriers in a wafer with thickness W, diffusion coefficient D and surface recombination rate S can be determined from the following expression:  where τ b is the bulk lifetime, which depends on the quality and purity of initial silicon ingots used for slicing of the wafers. The use of intrinsic amorphous hydrogenated silicon (i-a-Si:H) for passivation of crystalline silicon demonstrates the possibility of significant improvement in the lifetime of minority carriers in the wafer [8,9]. This represents an important factor for achieving high power conversion efficiencies demonstrated by heterojunction silicon solar cells. This paper describes the results of optimization and fabrication of a heterojunction silicon solar cell with a power conversion efficiency of 20 %.
Experimental methods. The process of fabrication of heterojunction silicon solar cells has been reported previously elsewhere [10]. At the first stage, wet chemical treatment of crystalline wafers comprising a variety of operations targeting removal of surface contaminants and wafer texturing. During the process, the wafers were sequentially immersed into caustic and acidic solutions and rinsed with water to conduct the processes of saw damage etching, texturing, oxidation and oxide layer removal. Deionized water with resistivity of 1…2 MΩ·cm, measured directly in rinsing baths, was employed for cleaning and texturing. Following removal of the oxide layer, the wafers were loaded into a plasma chemical deposition chamber for coating with intrinsic amorphous silicon and amorphous silicon doped with boron (B) and phosphorous (P) impurities, utilizing, respectively, monosilane (SiH4), trimethylborane (B(CH3)3) and phosphine (PH3) as process gases. Further, indium tin-oxide transparent electrodes were deposited on both sides of the samples. Wafer metallization was performed using the DEK Eclipse tool. Minority carrier lifetimes, reflectivity and current-voltage characteristics were measured using the Sinton WCT-120, PV Measurements QEX10 and PV Measurements IV-16L tools, respectively.
Results and Discussion. Texturing of the silicon wafers is performed in order to reduce their reflectivity and enhance optical absorption. Table 1 shows the reflectivity values of a non-textured wafer, as well as the wafers subjected to the texturing process at various concentrations of the etching agent.
It is evident, that the reflectivity is significantly reduced with the etchant concentration, however above 10 ml/l the rate of reduction in reflectivity with concentration slows down significantly. Surface images of the initial and textured wafers obtained by means of scanning electron microscopy (SEM), are shown in Fig. 1.

Optimization and Fabrication of Heterojunction Silicon Solar Cells Using an Experimental-Industrial Facility AK-1000 Inline
The size of the resulting pyramids is approximately 5 μm, the concentration of the etching agent is 12 ml/l, and the corresponding reflectance is 12 %. Similar results were obtained in [11], where for pyramids of 5 μm the reflection coefficient varied in close values of approximately 12.5…19 % at the incident light wavelengths of 400, 500, 600, and 700 nm. It also notes that usually a reflection coefficient of 14…15 % is typical for pyramids with sizes of 2…8 μm. In another work [12] by our team, textured samples with the lowest reflectance of the order of 12…13 % were obtained with a pyramid base of 5 μm. Table 2 presents the results of minority carrier lifetime measurements in monocrystalline silicon wafers following the deposition of intrinsic, as well as n-and pdoped amorphous silicon layers on both sides.
The measured lifetime values correlate with the results of other authors and indirectly confirm the results of computer simulations on the influence of amorphous layer thickness on solar cell output parameters, in particular, the open-circuit voltage [13,14]. It must be noted that, according to our preliminary study, the optimal thickness of the intrinsic amorphous silicon layers in the heterojunction cell is around 10 nm, as higher thicknesses result in reduction in the short-circuit current and, consequently, power conversion efficiency due to the growth in the device series resistance [15].    Output cell parameters are given in Table 3.
The efficiency of the device exceeds 20 % at the open-circuit voltage of 720 mV, which is somewhat lower than the conventional values for this class of solar cells, showing the potential for further growth in power conversion efficiency upon optimization of fabricating conditions and an improvement in the quality of silicon wafer surface passivation.